Hi all,
I looked around but couldn't see any cache management instructions for Xeon processors (I am working on Xeon E7-8860 v4). I found that we can use _mm_clevict for MIC architecture.
Is there a similar way to do this on Xeon E7-8860 v4? What I am looking to do is, reduce priority of some cache line so that it will be one of the first ones to get evicted. For instance;
int* arr = new int[ length ];
for ( int i = 0; i < length; ++i )
{
// use arr[i]
if ( ( i - 1 ) % CACHE_LINE_SIZE == 0 )
reduce_priority( arr[ i - 1] ); // reduces the priority of the cache line in which a[ i - 1 ] resides in
}
If not, can I achieve this by different means?
Any suggestion will be greatly appreciated.
Thanks a lot.
Matara Ma Sukoy
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